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LYT0002/0004-0006 lytswitch-0 off-line low power led driver ic family www.powerint.com june 2013 lowest component count, off-line switcher ic for non-isolated led lighting applications ? figure 1. typical application schematic (a) buck, (b) buck-boost. product highlights ? high power factor meeting eu and usa requirements ? very low component count ? frequency jitter reduces emi ? no bias supply or transformer required cost-effective led driver the lytswitch-0 family parts are a highly integrated combination of controller, driver and switching power mosfet that enable low component-count, non-isolated switching topologies for highly cost competitive led lighting applications. 66 khz operation together with frequency jittering insures a very low-cost emi flter. less than <50 ms start-up time turn-on without overshoot, improves end user experience C no delay. power factor correction allows designs that easily meet european and north american standards for pfc in consumer lighting applications. tight cc performance accurate current limit with tight line and load regulation that is stable over a wide temperature range makes the lytswitch-0 ideal for led lighting applications. comprehensive protection integrated auto-restart for short-circuit, open-circuit and open- loop faults as well as a high threshold over-temperature protection feature (min. 135 c) with automatic restart provide extensive protection at no additional cost. lytswitch-0 supports different led applications flyback, buck, buck-boost and boost architectures are all supported by the lytswitch-0 family. the 700 v switching power mosfet supports an input voltage range of 85 vac to 308 vac. description the lytswitch-0 family is specifcally designed for low cost led bulb replacement applications. lytswitch-0 devices integrate a 700 v power mosfet, oscillator, simple on/off control scheme, a high-voltage switched current source, frequency jittering, cycle-by-cycle current limit and thermal shutdown circuitry into a monolithic ic. the start-up and operating power are derived directly from the voltage on the drain pin. this eliminates the need for a bias supply and associated circuitry plus allowing low-cost discrete inductors to be used. the fully integrated auto-restart circuit in the lytswitch-0 family safely limits output power during fault conditions such as short-circuit or open-loop, reducing component count and lower system cost. package options for thru-hole and surface-mount suit different manufacturing requirements. output current table 1 product 6 pf 4,5 230 vac 15% 85-308 vac mdcm 2 ccm 3 mdcm 2 ccm 3 LYT0002 high 45 ma 65 ma 30 ma 40 ma low 63 ma 80 ma 63 ma 80 ma lyt0004 high 85 ma 110 ma 50 ma 70 ma low 98 ma 139 ma 98 ma 139 ma lyt0005 high 100 ma 140 ma 60 ma 90 ma low 120 ma 170 ma 120 ma 170 ma lyt0006 high 165 ma 220 ma 100 ma 140 ma low 200 ma 280 ma 200 ma 280 ma table 1. output current table. notes: 1. typical output current in a non-isolated buck converter. see key applications considerations section for more information. 2. mcm C mostly discontinuous mode. 3. ccm C continuous conduction mode. 4. pf high: >0.7 @ 120 vac and >0.5 @ 230 vac. 5. pf low: for non-pf application where c in >5 m f minimum. 6. packages: p: pdip-8b, d: so-8c. (a) (b) pi-6810-060613 fb bp s d v in lytswitch-0 v in pi-6819a-060613 + fb bp s d lytswitch-0 figure 2. package options. so-8c (d package) pdip-8b (p package)
rev. a 06/13 2 LYT0002/0004-0006 www.powerint.com table 2. common circuit confgurations using lytswitch-0 for driving leds. topology basic circuit schematic key features high-side buck C direct feedback ? output referenced to input ? positive output (v o ) with respect to -v in ? step down C v o < v in ? low cost direct feedback (5% typ.) low-side buck C constant current led driver; optocoupler feedback ? output referenced to input ? negative output (v o ) with respect to +v in ? step down C v o < v in ? optocoupler feedback ? low-cost non-safety rated optocoupler ? optional zener provides disconnected load protection ? accuracy determined by v f variation of optocoupler led high-side buck-boost C constant current led driver ? output referenced to input ? negative output (v o ) with respect to +v in ? step up/down C v o > v in or v o < v in ? low-cost direct feedback (5% typ.) ? fail-safe C output is not subjected to input voltage if the internal power mosfet fails ? ideal for driving leds C better accuracy and temperature stability than low-side buck constant current led driver low-side boost C constant current led driver ? output referenced to input ? positive output (v o ) with respect to -v in ? step up C v o > v in ? low-cost direct feedback (5% typ.) ? ideal for driving high-voltage leds string C good accuracy and temperature stability low-side flyback C constant current led driver ? output referenced to input ? positive output (v o ) with respect to -v in ? step down C v o < v in ? low-cost direct feedback (5% typ.) ? fail-safe C output is not subjected to input voltage if the internal power mosfet fails ? ideal for driving very low voltage leds string C ? good accuracy and temperature stability v in pi-7043-053113 + fb bp s d lytswitch-0 v in pi-7046-053113 + lytswitch-0 d s fb bp v in pi-7047-060313 + lytswitch-0 d s fb bp pi-7044-060313 + + bp fb d s v in i o r = v f v f i o lytswitch-0 v in pi-7045-060313 fb bp s d r sense i o lytswitch-0
rev. a 06/13 3 LYT0002/0004-0006 www.powerint.com figure 3a. functional block diagram LYT0002. pi-2367-032213 clock jitter oscillator 5.8 v 4.85 v source (s) s r q dc max bypass (bp) fault present + - v i limit leading edge blanking thermal shutdown + - drain (d) bypass pin undervoltage current limit comparator feedback (fb) q 6.3 v reset auto- restart counter 1.65 v -v t clock regulator 5.8 v figure 3b. functional block diagram lyt0004-0006. pi-3904-032213 clock jitter oscillator 5.8 v 4.85 v source (s) s r q dc max bypass (bp) + - v i limit leading edge blanking thermal shutdown + - drain (d) regulator 5.8 v bypass pin undervoltage current limit comparator feedback (fb) q 6.3 v 1.65 v -v t
rev. a 06/13 4 LYT0002/0004-0006 www.powerint.com pin functional description drain (d) pin: power mosfet drain connection. provides internal operating current for both start-up and steady-state operation. bypass (bp) pin: connection point for a 0.1 m f external bypass capacitor for the internally generated 5.8 v supply. feedback (fb) pin: during normal operation, switching of the power mosfet is controlled by this pin. power mosfet switching is terminated when a current greater than 49 m a is delivered into this pin. source (s) pin: this pin is the power mosfet source connection. it is also the ground reference for the bypass and feedback pins. lytswitch-0 functional description lytswitch-0 combines a high-voltage power mosfet switch with a power supply controller in one device. unlike conventional pwm (pulse width modulator) controllers, lytswitch-0 uses a simple on/off control to regulate the output voltage. the lytswitch-0 controller consists of an oscillator, feedback (sense and logic) circuit, 5.8 v regulator, bypass pin undervoltage circuit, over-temperature protection, frequency jittering, current limit circuit, leading edge blanking and a 700 v power mosfet. the lytswitch-0 incorporates additional circuitry for auto-restart. oscillator the typical oscillator frequency is internally set to an average of 66 khz. two signals are generated from the oscillator: the maximum duty cycle signal (dc max ) and the clock signal that indicates the beginning of each cycle. the lytswitch-0 oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 4 khz peak-to-peak, to minimize emi emission. the modulation rate of the frequency jitter is set to 1 khz to optimize emi reduction for both average and quasi-peak emissions. the frequency jitter should be measured with the oscilloscope triggered at the falling edge of the drain waveform. the waveform in figure 5 illustrates the frequency jitter of the lytswitch-0. feedback input circuit the feedback input circuit at the feedback pin consists of a low impedance source follower output set at 1.65 v. when the current delivered into this pin exceeds 49 m a, a low logic level (disable) is generated at the output of the feedback circuit. this output is sampled at the beginning of each cycle on the rising edge of the clock signal. if high, the power mosfet is turned on for that cycle (enabled), otherwise the power mosfet remains off (disabled). since the sampling is done only at the beginning of each cycle, subsequent changes in the feedback pin voltage or current during the remainder of the cycle are ignored. 5.8 v regulator and 6.3 v shunt voltage clamp the 5.8 v regulator charges the bypass capacitor connected to the bypass pin to 5.8 v by drawing a current from the voltage on the drain, whenever the power mosfet is off. the bypass pin is the internal supply voltage node for the lytswitch-0. when the power mosfet is on, the lytswitch-0 runs off of the energy stored in the bypass capacitor. extremely low power consumption of the internal circuitry allows the lytswitch-0 to operate continuously from the current drawn from the drain pin. a bypass capacitor value of 0.1 m f is suffcient for both high frequency decoupling and energy storage. bypass pin undervoltage the bypass pin undervoltage circuitry disables the power mosfet when the bypass pin voltage drops below 4.85 v. once the bypass pin voltage drops below 4.85 v, it must rise back to 5.8 v to enable (turn-on) the power mosfet. over-temperature protection the thermal shutdown circuitry senses the die temperature. the threshold is set at 142 c typical with a 75 c hysteresis. when the die temperature rises above this threshold (142 c) the power mosfet is disabled and remains disabled until the die temperature falls by 75 c, at which point it is re-enabled. current limit the current limit circuit senses the current in the power mosfet. when this current exceeds the internal threshold (i limit ), the power mosfet is turned off for the remainder of that cycle. the leading edge blanking circuit inhibits the current limit comparator for a short time (t leb ) after the power mosfet is turned on. this leading edge blanking time has been set so that current spikes caused by capacitance and rectifer reverse recovery time will not cause premature termination of the switching pulse cycle. auto-restart (lyt0004-0006) in the event of a fault condition such as output overload, output short, or an open loop condition, lytswitch-0 enters into auto-restart operation. an internal counter clocked by the oscillator gets reset every time the feedback pin is pulled pi-6899-060613 3b d package (so-8c) bp fb d 1 2 4 8 7 6 5 s s s s 3a fb d s bp s s s p package (pdip-8b) 8 5 7 1 4 2 3 figure 4. pin confguration.
rev. a 06/13 5 LYT0002/0004-0006 www.powerint.com high. if the feedback pin is not pulled high for 50 ms, the power mosfet switching is disabled for 800 ms. the auto- restart alternately enables and disables the switching of the power mosfet until the fault condition is removed. applications example a 6 w (output) universal input buck led driver converter the circuit shown in figure 6 is a typical implementation of a non-isolated, power factor corrected buck power supply for led driver applications. the simplicity and low component count make this ideal for space constrained, cost sensitive designs such as gu10 or a19 size lamps. this design was optimized to drive an led string at a voltage of 54 v with a constant current of 110 ma, giving 6 w of output power. the design operates over a universal input range from 90 vac to 265 vac and achieves an output current tolerance of < 5% at nominal line voltage. the input capacitance (c1 + c2) was reduced to achieve the highest possible power factor input figure 5. frequency jitter. 600 0 20 68 khz 64 khz v drain time (s) pi-3660-081303 500 400 300 200 100 0 while still meeting conducted emi limits. power factor is >0.5 at 230 vac and >0.7 pf at 120 vac meeting requirements for led lamps in europe and usa. the input stage comprises fusible resistor rf1, bridge rectifer br1, capacitors c1 and c2, and inductor l1. resistor rf1 is a fame proof, fusible, wire wound resistor. it accomplishes several functions: a) inrush current limitation to below specifcation of br1; b) differential mode conducted emi noise attenuation; c) fuse should any other component fail short-circuit; d) higher power factor. capacitor c1, c2 and inductor l1 forms a flter to reduce differential mode emi. capacitor c2 provides local decoupling for the switching current through u1. there is an optional parallel resistor on the board across l1 which damps the resonance of the pi flter. the power processing stage is formed by the integrated mosfet switch within lyt0006 (u1), a free-wheeling diode (d1), sense resistor (r2), power inductor (l2) and output capacitor (c5). to reduce reverse recovery losses in d1 the value of l2 was designed such that the converter operates in mostly discontinuous conduction mode. diode d1 is an ultrafast diode with a reverse recovery time (t rr ) 35 ns. this recovery is recommended due to the high ambient operating time temperature which will increase diode reverse recovery charge. a bobbin based ee10 core size indictor was selected for l2 in order to prevent changes in inductance value when placed inside a metal enclosure. lower cost drum core or dog bone inductor types may also be used, however these have an open magnetic path which can be shorted by a metal enclosure. this reduces the effective inductance and requires the value to be adjusted to take this into account when placed inside the fnal enclosure. capacitor c5 is the output flter capacitor; its primary function is to limit the output current ripple and ensures high frequency currents fow within as small as a loop area as possible to reduce emi. pi-6998f-061313 r1 4.7 k? c4 22 f 16 v c3 100 nf 25 v l1 4.7 mh c1 47 nf 630 v c2 330 nf 450 v rtn 54 v, 110 ma rf1 4.7 ? l2 5 br1 mb6s 600 v l n 90 - 265 vac d fb bp s + c5 47 f 63 v 4 r2 18.7 ? 1% lytswitch-0 u1 lyt0006p d1 murs160t3g rv1* 275 vac *optional <1 kv surge requirements figure 6. universal input, 54 v, 110 ma constant current power supply using lytswitch-0.
rev. a 06/13 6 LYT0002/0004-0006 www.powerint.com the output current is regulated via the voltage across r2 during the free-wheeling period when the internal mosfet of u1 is off. this voltage is fltered by capacitor (c4) and fed into the feedback pin of u1. regulation is maintained by skipping switching cycles. as the output current rises, the voltage on the feedback pin will rise. if this exceeds v fb then subsequent cycles will be skipped until the voltage reduces below v fb . open-loop protection is provided via the auto-restart function. if no cycles are skipped during a 50 ms period lytswitch-0 will enter auto-restart (lyt0004-0006), limiting the average output power to approximately 6% of the maximum overload power. the auto-restart function requires the value of c3 to be 100 nf or greater such that the ic remains operational from half-line cycle to half-line cycle. for disconnected led protection an optional zener (not shown) can be placed across the output. this will fuse short-circuit and prevent the output voltage rising. key application considerations lytswitch-0 design considerations output current table data sheet maximum output current table (table 1) represents the maximum practical continuous output current for both mostly discontinuous conduction mode (mdcm) and continuous conduction mode (ccm) of operation that can be delivered from a given lytswitch-0 device under the following assumed conditions: 1. buck converter topology. 2. the minimum dc input voltage is equal to voltage output. 3. for ccm operation a krp* of 0.4. 4. output voltage of 54 vdc. 5. effciency of 90%. 6. a catch/free-wheeling diode with t rr 35 ns is used. 7. the part is board mounted with source pins soldered to a suffcient area of copper to keep the source pin tempera - ture at or below 100 c. *krp is the ratio of ripple to peak inductor current. lytswitch-0 selection and selection between mdcm and ccm operation select the lytswitch-0 device, free-wheeling diode and output inductor that gives the lowest overall cost. in general, mdcm provides the lowest cost and highest effciency converter. ccm designs require a larger inductor and ultrafast (t rr 35 ns) free-wheeling diode in all cases. it is lower cost to use a larger lytswitch-0 in mdcm than a smaller linkswitch-0 in ccm because of the additional external component costs of a ccm design. however, if the highest output current is required, ccm should be employed following the guidelines below. topology options lytswitch-0 can be used in all common topologies, with or without an optocoupler and reference to improve output voltage tolerance and regulation. table 2 provide a summary of these confgurations. component selection referring to figure 6, the following considerations may be helpful in selecting components for a lytswitch-0 design. optional varistor (rv1) the metal oxide varistor (rv1) is used to suppress the line surge in order to meet iec61000-4-5 (differential input line 1.2/50 m s and differential ring wave input line surge). a mov is recommended for high pf designs with surge levels of 1 kv or greater. high pf design requires lower input capacitance values giving a greater voltage rise across limited input capacitance during surge events. a mov is typically not required if the design will use high-input capacitance ( m fs vs. nfs) (non-pf application). input capacitance c1 and c2 use a flm capacitor if the input capacitance is less than 1 m f. make sure that the rms current rating is not exceeded especially if planning to use electrolytic capacitor. for universal or high- line only input design use 400 v or 630 v rated capacitors, and for low-line only use 250 v rated capacitors for lower cost and smaller size. free-wheeling diode d1 diode d1 should be an ultrafast type. for mdcm, reverse recovery time of 75 ns should be used in designs where the diode temperature is 70 c or below. slower diodes are not acceptable, as continuous mode operation will always occur during start-up, causing high leading edge current spikes, terminating the switching cycle prematurely, and preventing the output from reaching regulation. if the diode temperature is above 70 c then a diode with a reverse recovery time of 35 ns should be used. for ccm an ultrafast diode with reverse recovery time 35 ns should be used. slower diodes cause excessive leading edge current spikes, terminating the switching cycle prematurely and preventing full power delivery. standard plastic or fast (t rr >75 ns) diodes should never be used as the large reverse recovery currents can cause excessive power dissipation in the diode and/or exceed the maximum drain current specifcation of lytswitch-0. inductor l1 choose any standard off-the-shelf inductor that meets the design requirements. a drum or dog bone i core inductor is recommended with a single ferrite element due to its low-cost and very low audible noise properties. the typical inductance value and rms current rating can be obtained from the lytswitch-0 pixls design spreadsheet. the pixls application is part of the pi expert design suite available for free download from power integrations. choose l1 greater than or equal to the typical calculated inductance. note that the open magnetic path of non-shielded discrete inductors may cause inductance value changes when placed within metal enclosure requiring a larger value to be used.
rev. a 06/13 7 LYT0002/0004-0006 www.powerint.com output capacitor c5 the primary function of capacitor c5 is to smooth the inductor current. select a low or ultra-low esr series if electrolytic types are used to ensure capacitor heating is minimized. ceramic or solid polymer types are also suitable but are typically higher cost per unit capacitance. select the voltage rating to be the nearest above the led string voltage. select the initial capacitance value based on the ripple current parameter calculated in the design spreadsheet. the capacitance value may be further increased to reduce the led ripple current dependent on the specifcation requirements of the driver. for long life use 105 c or above rated parts unless the ambient temperature inside the lamp is less than 80 c and select a series with an appropriate lifetime rating. note that operating electrolytic capacitors below their rated temperature specifcation will signifcantly extend their lifetime e.g., 105 c capacitor operated at 80 c will increase lifetime by a factor of 2 to 3. sense resistor r2 sense resistor should be a 1% tolerance and either pulse rated or overdesigned to avoid resistance drift with time. if using a standard metal flm type, overdesign power rating by 2-4 times. the value of the resistor is provided in the design spreadsheet. feedback capacitor c4 capacitor c4 can be a low-cost general purpose capacitor. it provides a sample and hold function, charging to the sensed current value during the off-time of lytswitch-0. its value should be 10 m f to 22 m f; smaller values cause poorer regulation and lower effciency. this capacitor also bypasses the switching current during the free-wheeling period, reducing the sense resistor dissipation. lytswitch-0 layout considerations in the buck or buck-boost converter confguration, since the source pins in lytswitch-0 are switching nodes, the copper area connected to source should be minimized to minimize emi within the thermal constraints of the design. in the boost and non-isolated fyback confguration, since the source pins are tied to dc return, the copper area connected to source can be maximized to improve heat sinking. the loop formed between the lytswitch-0, inductor (l2), free-wheeling diode (d1), and output capacitor (c5) should be kept as small as possible. the bypass pin capacitor c3 (figure 7a) should be located physically close to the source (s) and bypass (bp) pins. to minimize direct coupling from dc output c1 rf1 rv1 l1 r1 vr1 pi-7033-052913 optimize hatched copper areas ( ) for heat sinking. ac input c2 c5 l2 d1 c4 r3 r2 br1 ~ ~ + ? lytswitch-0 fb bp d s s s s u1 + c3 figure 7a. recommended printed circuit layout for lytswitch-0 in a buck converter confguration using p package.
rev. a 06/13 8 LYT0002/0004-0006 www.powerint.com switching nodes, the lytswitch-0 should be placed away from ac input lines. it may be advantageous to place capacitors c1 and c2 in-between lytswitch-0 and the ac input. quick design checklist as with any power supply design, all lytswitch-0 designs should be verifed for proper functionality on the bench. the following minimum tests are recommended: 1. correct diode selection C uf400x series diodes are recommended only for designs that operate in mdcm at an ambient of 70 c or below. for designs operating in continuous conduction mode (ccm) and/or higher ambient, then a diode with a reverse recovery time of 35 ns or better, such as the byv26c, is recommended. 2. maximum drain current C verify that the peak drain current is below the data sheet peak drain specifcation under worst-case conditions of highest line voltage, maximum overload (just prior to auto-restart) and highest ambient temperature. 3. thermal check C at maximum output power, minimum input voltage and maximum ambient temperature, verify that the lytswitch-0 source pin temperature is 110 c or below. this fgure ensures adequate margin due to variations in r ds(on) from part to part. a battery powered thermocouple meter is recommended to make measurements when the source pins are a switching node. alternatively, the ambient temperature may be raised to indicate margin to thermal shutdown. 4. check for any presence of reverse current in the drian pin during start-up with the output capacitance fully discharged. presence of reverse current is possible for ccm (high-power inductance >3 mh) at certain conditions for limited input capacitance (v out = v bulk_min every input half-line ac cycle). using a current probe, check if negative current is measured either by increase input capacitance, reduce inductance or place an ultrafast diode in series with the drain node. 5. follow the design procedure in an-60 for the optimum line regulation. 6. power factor can be optimized by adjusting the conduction time of the bridge rectifer. refer to an-60 for more details. in a lytswitch-0 design using a buck or buck-boost converter topology, the source pin is a switching node. oscilloscope measurements should therefore be made with probe grounded to a dc voltage, such as primary return or dc input rail, and not to the source pins. the power supply input must always be supplied from an isolated source (e.g. via an isolation transformer). dc output rf1 rv1 l1 r1 br1 c1 u1 d1 c2 c5 vr1 pi-7032-061313 optimize hatched copper areas ( ) for heat sinking. ac input lytswitch-0 s d s s s bp fb ~ ~ + ? c4 r3 r2 l2 + c3 figure 7b. recommended printed circuit layout for lytswitch-0 in a buck converter confguration using d package to bottom side of the board.
rev. a 06/13 9 LYT0002/0004-0006 www.powerint.com absolute maximum ratings (1,5) drain pin voltage .............................................. -0.3 v to 700 v peak drain pin current (LYT0002) .............. 200 ma (375 ma) (2) peak drain pin current (lyt0004) .............. 400 ma (750 ma) (2) peak drain pin current (lyt0005) ............ 800 ma (1500 ma) (2) peak drain pin current (lyt0006) .......... 1400 ma (2600 ma) (2) feedback pin voltage .......................................... -0.3 v to 9 v feedback pin current ................................................. 100 ma bypass pin voltage ............................................... -0.3 v to 9 v storage temperature ...................................... -65 c to 150 c operating junction temperature (3) ................... -40 c to 150 c lead temperature (4) ......................................................... 260 c notes: 1. all voltages referenced to source, t a = 25 c. 2. the higher peak drain current is allowed if the drain to source voltage does not exceed 400 v. 3. normally limited by internal circuitry. 4. 1/16 in. from case for 5 seconds. 5. maximum ratings specifed may be applied, one at a time, without causing permanent damage to the product. exposure to absolute maximum rating conditions for extended periods of time may affect product reliability. thermal resistance thermal resistance: p package: ( q ja ) ................................ 70 c/w (3) ; 60 c/w (4) ( q jc ) (1) ................................................. 11 c/w d package: ( q ja ) ..................... ......... 100 c/w (3) ; 80 c/w (4) ( q jc ) (2) ................................................. 30 c/w notes: 1. measured on pin 2 (source) close to plastic interface. 2. measured on pin 8 (source) close to plastic interface. 3. soldered to 0.36 sq. in. (232 mm 2 ), 2 oz. (610 g/m 2 ) copper clad. 4. soldered to 1 sq. in. (645 mm 2 ), 2 oz. (610 g/m 2 ) copper clad. parameter symbol conditions source = 0 v; t j = -40 to 125 c see figure 8 (unless otherwise specifed) min typ max units control functions output frequency f osc t j = 25 c average 62 66 70 khz peak-peak jitter 4 maximum duty cycle dc max s2 open 66 69 72 % feedback pin turnoff threshold current i fb t j = 25 c 30 49 68 m a feedback pin voltage at turnoff threshold v fb 1.54 1.65 1.76 v drain pin supply current i s1 v fb 2 v (mosfet not switching ) see note a 130 220 m a i s2 feedback open (mosfet switching) see notes a, b LYT0002 165 260 m a lyt0004 173 280 lyt0005 190 310 lyt0006 226 330
rev. a 06/13 10 LYT0002/0004-0006 www.powerint.com parameter symbol conditions source = 0 v; t j = -40 to 125 c see figure 8 (unless otherwise specifed) min typ max units control functions (cont.) bypass pin charge current i ch1 v bp = 0 v t j = 25 c see note c LYT0002/0004 -5.5 -3.35 -1.8 ma lyt0005-0006 -7.5 -4.6 -2.5 i ch2 v bp = 4 v t j = 25 c see note c LYT0002/0004 -3.8 -2.3 -1.0 lyt0005-0006 -4.5 -3.3 -1.5 bypass pin voltage v bp 5.55 5.8 6.10 v bypass pin voltage hysteresis v bph 0.8 0.95 1.2 v bypass pin supply current i bpsc see note d 68 m a circuit protection current limit i limit (see note e) di/dt = 55 ma/ m s t j = 25 c LYT0002 126 136 146 ma di/dt = 250 ma/ m s t j = 25 c 145 165 185 di/dt = 65 ma/ m s t j = 25 c lyt0004 195 210 225 di/dt = 415 ma/ m s t j = 25 c 222 265 282 di/dt = 75 ma/ m s t j = 25 c lyt0005 240 257 275 di/dt = 500 ma/ m s t j = 25 c 271 310 345 di/dt = 95 ma/ m s t j = 25 c lyt0006 350 375 401 di/dt = 610 ma/ m s t j = 25 c 396 450 504 minimum on time t on(min) LYT0002/0004 280 360 475 ns lyt0005 360 460 610 lyt0006 400 500 675 leading edge blanking time t leb t j = 25 c see note f 170 215 ns thermal shutdown temperature t sd 135 142 150 c thermal shutdown hysteresis t shd see note g 75 c
rev. a 06/13 11 LYT0002/0004-0006 www.powerint.com parameter symbol conditions source = 0 v; t j = -40 to 125 c see figure 8 (unless otherwise specifed) min typ max units output on-state resistance r ds(on) LYT0002 i d = 13 ma t j = 25 c 42 55.2 w t j = 100 c 67 88.4 lyt0004 i d = 25 ma t j = 25 c 21 27.6 t j = 100 c 40 44.2 lyt0005 i d = 35 ma t j = 25 c 11 13.8 t j = 100 c 19 22.1 lyt0006 i d = 45 ma t j = 25 c 6 8.1 t j = 100 c 11 12.9 off-state drain leakage current i dss v bp = 6.2 v, v fb 2 v, v ds = 560 v, t j = 25 c LYT0002 50 m a lyt0004 60 lyt0005 75 lyt0006 90 breakdown voltage bv dss v bp = 6.2 v, v fb 2 v, t j = 25 c 700 v rise time t r measured in a typical buck converter application 50 ns fall time t f 50 ns drain supply voltage 50 v output enable delay t en see figure 10 10 m s output disable setup time t dst 0.5 m s auto-restart on-time t ar t j = 25 c see note h LYT0002 ms lyt0004-0006 50 auto-restart duty cycle dc ar LYT0002 % lyt0004-0006 6 not applicable not applicable notes: a. total current consumption is the sum of i s1 and i dss when feedback pin voltage is 2 v (mosfet not switching) and the sum of i s2 and i dss when feedback pin is shorted to source (mosfet switching). b since the output power mosfet is switching, it is diffcult to isolate the switching current from the supply current at the drain. an alternative is to measure the bypass pin current at 6 v. c. see typical performance characteristics section figure 15 for bypass pin start-up charging waveform. d. this current is only intended to supply an optional optocoupler connected between the bypass and feedback pins and not any other external circuitry. e. for current limit at other di/dt values, refer to figure 14. f. this parameter is guaranteed by design. g. this parameter is derived from characterization. h. auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency).
rev. a 06/13 12 LYT0002/0004-0006 www.powerint.com figure 8. lytswitch-0 general test circuit. pi-3490-060204 50 v 50 v d fb s s s s bp s1 470 k? s2 0.1 f 470 ? 5 w pi-3707-112503 fb t p t en dc max t p = 1 f osc v drain (internal signal) figure 9. lytswitch-0 duty cycle measurement. figure 10. lytswitch-0 output enable timing.
rev. a 06/13 13 LYT0002/0004-0006 www.powerint.com 200 300 350 400 250 0 0 4 2 8 6 10 12 14 16 18 20 drain voltage (v) drain current (ma) pi-6813-061213 50 150 100 scaling factors: LYT0002 0.5 lyt0004 1.0 lyt0005 2.0 lyt0006 3.4 25 c 100 c typical performance characteristics figure 15. bypass pin start-up waveform. 1.1 1.0 0.9 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) breakdown voltage (normalized to 25 c) pi-2213-012301 6 5 4 3 2 1 0 0 0.2 0.4 0.6 0.8 1.0 time (ms) pi-2240-012301 bypass pin voltage (v) 7 figure 11. breakdown vs. temperature. figure 13. current limit vs. temperature at normalized di/dt. figure 14. current limit vs. di/dt. figure 16. output characteristics. 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 junction temperature ( c) pi-2680-012301 output frequency (normalized to 25 c) figure 12. frequency vs. temperature. normalized di/dt pi-6812-061213 normalized current limit 1.0 1.2 1.4 0.8 0.6 0.4 0.2 0 1 2 3 4 5 6 LYT0002 lyt0004 lyt0005 lyt0006 normalized di/dt = 1 55 ma/s 65 ma/s 75 ma/s 95 ma/s normalized current limit = 1 136 ma 210 ma 257 ma 450 ma temperature (c) pi-3709-111203 current limit (normalized to 25 c) 1.0 1.2 1.4 0.8 0.6 0.4 0.2 0 -50 0 50 100 150 di/dt = 1 di/dt = 6 normalized di/dt
rev. a 06/13 14 LYT0002/0004-0006 www.powerint.com figure 17. c oss vs. drain voltage. drain voltage (v) drain capacitance (pf) pi-6814-061213 0 100 200 300 400 500 600 1 10 100 1000 LYT0002 0.5 lyt0004 1.0 lyt0005 2.0 lyt0006 3.4 scaling factors: typical performance characteristics (cont.)
rev. a 06/13 15 LYT0002/0004-0006 www.powerint.com notes: 1. package dimensions conform to jedec specification ms-001-ab (issue b 7/85) for standard dual-in-line (dip) package with .300 inch row spacing. 2. controlling dimensions are inches. millimeter sizes are shown in parentheses. 3. dimensions shown do not include mold flash or other protrusions. mold flash or protrusions shall not exceed .006 (.15) on any side. 4. pin locations start with pin 1, and continue counter-clock- wise to pin 8 when viewed from the top. the notch and/or dimple are aids in locating pin 1. pin 6 is omitted. 5. minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 6. lead width measured at package body . 7. lead spacing measured with the leads constrained to be perpendicular to plane t. .008 (.20) .015 (.38) .300 (7.62) bsc (note 7) .300 (7.62) .390 (9.91) .367 (9.32) .387 (9.83) .240 (6.10) .260 (6.60) .125 (3.18) .145 (3.68) .057 (1.45) .068 (1.73) .120 (3.05) .140 (3.56) .015 (.38) minimum .048 (1.22) .053 (1.35) .100 (2.54) bsc .014 (.36) .022 (.56) -e- pin 1 sea ting plane -d- -t - p08b pdip-8b (p package) pi-2551-040110 d s .004 (.10) t e d s .010 (.25) m (note 6) .137 (3.48) minimum
rev. a 06/13 16 LYT0002/0004-0006 www.powerint.com pi-4526-0401 10 d07c 3.90 (0.154) bsc notes: 1. jedec reference: ms-012. 2. package outline exclusive of mold flash and metal burr . 3. package outline inclusive of plating thickness. 4. datums a and b to be determined at datum plane h. 5. controlling dimensions are in millimeters. inch dimensions are shown in parenthesis. angles in degrees. 0.20 (0.008) c 2x 1 4 5 8 2 6.00 (0.236) bsc d 4 a 4.90 (0.193) bsc 2 0.10 (0.004) c 2x d 0.10 (0.004) c 2x a-b 1.27 (0.050) bsc 7x 0.31 - 0.51 (0.012 - 0.020) 0.25 (0.010) m c a-b d 0.25 (0.010) 0.10 (0.004) (0.049 - 0.065) 1.25 - 1.65 1.75 (0.069) 1.35 (0.053) 0.10 (0.004) c 7x c h o 1.27 (0.050) 0.40 (0.016) gauge plane 0 - 8 1.04 (0.041) ref 0.25 (0.010) bsc sea ting plane 0.25 (0.010) 0.17 (0.007) det ail a det ail a c sea ting plane pin 1 id b 4 + + + 4.90 (0.193) 1.27 (0.050) 0.60 (0.024) 2.00 (0.079) reference solder pad dimensions + so-8c (d package) part ordering information ? lytswitch-0 product family ? lyt series number ? package identifer p plastic pdip-8b d plastic so-8c ? tape & reel and other options blank standard confgurations tl tape & reel, 2.5 k pcs minimum for d package. not available for p package. lyt 0002 d - tl
rev. a 06/13 17 LYT0002/0004-0006 www.powerint.com
for the latest updates, visit our website: www.powerint.com power integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. power integrations does not assume any liability arising from the use of any device or circuit described herein. power integrations makes no warranty herein and specifically disclaims all warranties including, without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement of third party rights. patent information the products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more u.s. and foreign patents, or potentially by pending u.s. and foreign patent applications assigned to power integrations. a complete list of power integrations patents may be found at www.powerint.com. power integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. life support policy power integrations products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of power integrations. as used herein: 1. a life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in signifcant injury or death to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. the pi logo, topswitch, tinyswitch, linkswitch, lytswitch, dpa-switch, peakswitch, capzero, senzero, linkzero, hiperpfs, hipertfs, hiperlcs, qspeed, ecosmart, clampless, e-shield, filterfuse, stakfet, pi expert and pi facts are trademarks of power integrations, inc. other trademarks are property of their respective companies. ?2013, power integrations, inc. power integrations worldwide sales support locations world headquarters 5245 hellyer avenue san jose, ca 95138, usa. main: +1-408-414-9200 customer service: phone: +1-408-414-9665 fax: +1-408-414-9765 e-mail: usasales@powerint.com china (shanghai) rm 1601/1610, tower 1, kerry everbright city no. 218 tianmu road west, shanghai, p.r.c. 200070 phone: +86-21-6354-6323 fax: +86-21-6354-6325 e-mail: chinasales@powerint.com china (shenzhen) 3rd floor, block a, zhongtou international business center, no. 1061, xiang mei rd, futian district, shenzhen, china, 518040 phone: +86-755-8379-3243 fax: +86-755-8379-5828 e-mail: chinasales@powerint.com germany lindwurmstrasse 114 80337 munich germany phone: +49-895-527-39110 fax: +49-895-527-39200 e-mail: eurosales@powerint.com india #1, 14th main road vasanthanagar bangalore-560052 india phone: +91-80-4113-8020 fax: +91-80-4113-8023 e-mail: indiasales@powerint.com italy via milanese 20, 3rd. fl. 20099 sesto san giovanni (mi) italy phone: +39-024-550-8701 fax: +39-028-928-6009 e-mail: eurosales@powerint.com japan kosei dai-3 bldg. 2-12-11, shin-yokohama, kohoku-ku yokohama-shi kanagwan 222-0033 japan phone: +81-45-471-1021 fax: +81-45-471-3717 e-mail: japansales@powerint.com korea rm 602, 6fl korea city air terminal b/d, 159-6 samsung-dong, kangnam-gu, seoul, 135-728, korea phone: +82-2-2016-6610 fax: +82-2-2016-6630 e-mail: koreasales@powerint.com singapore 51 newton road #19-01/05 goldhill plaza singapore, 308900 phone: +65-6358-2160 fax: +65-6358-2015 e-mail: singaporesales@powerint.com taiwan 5f, no. 318, nei hu rd., sec. 1 nei hu dist. taipei 11493, taiwan r.o.c. phone: +886-2-2659-4570 fax: +886-2-2659-4550 e-mail: taiwansales@powerint.com europe hq 1st floor, st. jamess house east street, farnham surrey gu9 7tj united kingdom phone: +44 (0) 1252-730-141 fax: +44 (0) 1252-727-689 e-mail: eurosales@powerint.com applications hotline world wide +1-408-414-9660 applications fax world wide +1-408-414-9760 revision notes date a initial release 06/13

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